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Verification Design Engineer

Job no: 496594
Work type: Experienced
Location: Pune, India
Categories: Graphics, Testing

The PowerVR Graphics team produce the world's leading family of ultra-low power GPU IP cores. To create and release our next generation of ultra-high performing processors we need you to put your verification and validation skills to the test and help us develop the next big thing in GPUs. This means verifying the specification, design and key components that will ensure a successful release.

This is a unique opportunity to join a global team working on state of the art technologies, cutting edge tools and to gain exposure to the whole verification life cycle.

You will

  • Working as part of the graphics team to gain breadth of the full verification cycle on both high end and low end architectures
  • Plan, design and develop the test environment to be used before the RTL is released
  • Be responsible for ensuring the specification matches the release
  • Follow UVM methodology at module level and top level verification of PowerVR's graphics cores
  • Understanding of VHDL and/or Verilog programming languages

Abilities make possibilities 
Committed to making your customers, stakeholders and colleagues successful, you’re an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. You’re curious, solutions orientated and a world class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard.

You have

  • Demonstrable experience in a verification role
  • Knowledge of digital design verification techniques and methodologies such as the OVM / UVM methodology
  • Knowledge System Verilog language (or ‘e’ knowledge as an alternative)
  • Hands on experience in developing test benches, tests, sequences, functional coverage and checks 
  • Knowledge of  VHDL and/or Verilog programming languages
  • Experience of IP or SOC level integrated circuit verification
  • Experience of verification planning
  • The ability to determine module verification requirements from analysis of specifications

You might also have

  • Experience in IP RTL Design
  • Sub-system knowledge related to memory and memory hierarchy
  • Subsystem verification closure using the above methodology and language
  • Hands on experience in assertions (SVA / PSL) and VIPs
  • Knowledge of transaction level modelling
  • Experience / knowledge of AMBA protocols including AXI4 and ACE
  • Knowledge of low power design techniques and power aware verification
  • Experience of Formal verification techniques
  • SystemVerilog, C, SystemC, C++, Python, Perl, TCL

Invent the future
The people at Imagination enable the tech that’s shaping our world, from virtual reality to smart phones, autonomous cars to space probes. It’s their creativity that has enabled Imagination to power world-changing electronic products. Dare to dream big? We’ll encourage you to pursue your dream. We listen, we’re open and we’re honest. Whatever it is you need, you’ll be respected and helped along your way.

Want to join the team?
Just click the ‘Apply now’ button to send in your CV.


Advertised: India Standard Time
Applications close:

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